1. Field of the Invention
The present invention relates to the field of display technology, and in particular to a thin-film-transistor (TFT) substrate structure and a manufacturing method thereof.
2. The Related Arts
In the active matrix display technology, each pixel is driven by a thin-film transistor (TFT) that is integrated on the back side thereof in order to achieve a screen displaying effect of high speed, high brightness, and high contrast. A common TFT is composed of three electrodes of gate/source/drain, insulation layers, and a semiconductor layer. The gate electrode controls a working area (depletion zone and accumulation zone) of the semiconductor layer in order to control on/off the TFT. The semiconductor layer comprises a channel formed therein. For a TFT having a back channel etched (BCE) structure, the channel comprises a front conductive channel in close proximity to the gate electrode and a back channel that is exposed outside. For an N-type doped semiconductor layer, when a positive bias is applied to the gate electrode, the front conductive channel that is in close proximity to the gate electrode (the front conductive channel and the gate electrode being separated by an insulation layer) accumulates electrons therein so that the TFT is in an ON state, so that when a bias between the source and drain electrodes is increased, an electric current flows through the TFT.
Although in view of the spatial relationship, the back channel of the TFT is spaced from the front conductive channel by a distance that is relatively far the property of the back channel interface of the TFT has a vital influence on an output electrical curve of the TFT. For the TFT having the BCE structure, the process for forming the channel may easily damage the back channel. Further, the damaged back channel, once exposed to the atmosphere, may readily cause defects in the back channel due to attachment of moisture/oxygen thereto, thereby leading to deterioration of the TFT characteristic curve identified in a stability test and an increase of leakage current so as to result reduction of device stability. A solution is to use a TFT that adopts an etch stop layer (ESL) involved structure in which SiOx is provided for protecting the back channel. However, materials of the type of SiOx provide only a limited capability of blocking water. Further, in such a structure, the connection between a metal electrode and a semiconductor layer is achieved with a via. Thus, an additional masking process would be needed in an actual manufacturing process for forming the via. This extends the manufacturing time and increases the manufacturing cost.
Graphene is a nanometer material that is currently known to be the thinnest and hardest. Since it shows excellent electric adjustability, mechanical property, and thermal conductivity, it is one of the current hot spots of researches. It is proposed a graphene film manufactured with a roll-to-roll manner shows extremely low sheet resistance (<100Ω/□−1) and allows for formation of a two-dimensional insulation material with a wide band gap after being doped. Further, a single layer of graphene shows excellent property of blocking moisture/oxygen and may effectively prevent oxidization of metal. Finally, there are a lot of successful examples showing that the property of a graphene film of a single layer or multiple layers will not be significantly damaged when transferred from a substrate to another substrate.